The present invention relates to a joined base comprising a pair of bases (combinations of a semiconductor chip and a circuit board, a semiconductor chip and a semiconductor chip or others) and a method for processing the base (method for fabricating the semiconductor device) which are suitably applicable specifically to the so-called RFID, smart cards, etc.
As the recent electronic apparatuses are more down-sized and thinner, the electronic parts are more required to be mounted in higher densities, and flip-chip mounting, in which electronic parts, such as a semiconductor chip, etc., in bare state are mounted directly on a substrate has been used. On the electrodes of a semiconductor chip used in the flip-chip mounting, bump electrodes are formed to thereby electrically connect the bump electrodes and the interconnections of a circuit board.
The method for forming metal terminals typically include electrolytic plating method, electroless plating method, solder dipping method, solder print transfer method, printing method, etc.
In the electrolytic plating method, a sample is disposed in a plating solution, and while current is supplied to a seed electrode connected to electrode pads, metal terminals are formed at once on the electrode pads patterned in a photo step. A characteristic of the electrolytic plating is that metal terminals of a high aspect ratio can be formed at a several μm ˜10's μm pitch by using a resist of high resolution. The materials for the metal terminals for the electrolytic plating method are gold, solder, etc.
In the electroless plating method, metal terminals can be formed at once on arbitrary electrode pads. Characteristics of the electroless plating method are that the plating isotropically grows and no photo step is necessary.
In the solder dipping method, a sample having electrode pads is dipped in a molten metal of low melting point containing Sn, Pb or others as the main component and is lifted to thereby cause the low-melting point metal moistened only on the electrode pads due to the surface tension to cool and solidified, and metal terminals are formed.
In the solder print transfer method, a low-melting point metal containing Sn, Pb or others as the main component is pasted and is print applied to recesses formed in a metal plate at electrode pad positions, is reflowed to make the low-melting point metal into spherical electrodes, and the spherical electrodes are transferred to the electrode pads of a sample at once.
In the printing method, by using a fixed mask, not only a metal paste is printed, but also materials mixing organic materials and metal powders, such as conductive silver paste, are used as pad electrodes of low cost.
Furthermore, as techniques for joining the metal terminals of a semiconductor chip and the metal terminals of a circuit board in the flip chip mounting, the following techniques are proposed.
Patent Document 1 discloses the technique that the surface of a semiconductor chip are covered with an adhesive insulating resin, and the insulating resin and the metal terminals are processed by grinding to be a uniform flat surface.
Patent Document 2 discloses the technique that the surface of the semiconductor chip having metal terminals are covered with an insulating resin, the surface of the insulating resin is polished to expose the metal terminals, and then the metal terminals are opposed to each other and joined by thermcompression bonding.
Patent Document 3 discloses the technique that a semiconductor chip and a circuit board are press contacted with each other with a thermosetting resin interposed therebetween, and supersonic vibrations are applied while sustaining the viscosity of the thermosetting resin not to gel the thermosetting resin to thereby form a solid-state diffused layer at the joint between the metal terminals to join the metal terminals to each other.
Patent Document 4 discloses the technique that a semiconductor chip and a circuit board are press contacted with each other with a thermosetting resin interposed therebetween, and the range of sustaining the viscosity of the thermoplastic resin is made narrower than that in Patent Document 2 to form a solid-state diffused layer at the joint between the metal terminals to join the metal terminals to each other.
Patent Document 5 discloses the technique that when a semiconductor chip and a circuit board are joined to each other with a thermoplastic resin interposed therebetween, infrared radiation untransmitting alignment marks are formed at parts of the semiconductor chip except the metal terminals are formed, and the alignment marks are detected by an infrared camera for the alignment.
Patent Document 6 discloses the technique that when a semiconductor chip and a circuit board are joined to each other with a thermosetting resin interposed therebetween, pressure is applied to the metal terminals (conductive patterns) of the circuit board to elastically deform the metal terminals, and the thermosetting resin is set to join the metal terminals to each other with pressurized.
(Patent Document 1) Japanese published unexamined patent application No. Hei 09-237806
(Patent Document 2) Japanese published unexamined patent application No. Hei 11-274241
(Patent Document 3) Japanese published unexamined patent application No. 2001-298146
(Patent Document 4) Japanese published unexamined patent application No. 2003-258034
(Patent Document 5) Japanese published unexamined patent application No. 2002-252245
(Patent Document 6) Japanese published unexamined patent application No. 2001-144141